Example embodiments relate to semiconductor devices, more particularly, to input buffer circuits and to semiconductor memory devices and memory systems including buffer circuits.
In general, semiconductor memory devices receive external clock signals, and operate based on the clock signals as reference timing. For example, synchronous dynamic random access memories (DRAMs) read and write data in synchronization with the external clock signal. Input of the clock signal and commands to the semiconductor memory device is controlled by a clock enable signal. When the clock enable signal is input to the semiconductor memory device before the clock signal is input to the semiconductor memory device (due to various factors such as noise), the semiconductor memory device may operate according to an incorrect command.